仠2013擭搙 (2015-05-10)

仜榑暥
[1] Hiroshi Nakamura, Weihan Wang, Yuya Ohta, Kimiyoshi Usami, 
    Hideharu Amano, Masaaki Kondo, Mitaro Namiki: Fine-Grained 
    Run-Tume Power Gating through Co-optimization of Circuit, 
    Architecture, and System Software Design, IEICE Transactions 
    on Electronics, Vol.E96-C, No.4, pp.404-412 (2013.4).
[2] Mikiko Sato, Go Fukazawa, Kazumi Yoshinaga, Yuichi Tsujita, 
    Atsushi Hori, Mitaro Namiki: A Hybrid Operating System for a 
    Computing Node with Multi-Core and Many-Core Processors,
    International Journal of Advanced Computer Science(IJACSci), 
    Vol.3, No.7, pp.368-377, ISSN: 2251-6379, July, 2013. 
[3] Noriyuki Miura, Yusuke Koizumi, Yasuhiro Take, Hiroki Matsutani, 
    Tadahiro Kuroda, Hideharu Amano, Ryuichi Sakamoto, Mitaro Namiki, 
    Kimiyoshi Usami, Masaaki Kondo and Hiroshi Nakamura:
    A Scalable 3D Heterogeneous Multicore with an Inductive ThruChip 
    Interface 3D NoC, IEEE Micro, Vol.33, Issue 6, pp.6-15, Nov/Dec. 2013.

仜崙嵺夛媍
[1] Noriyuki Miura, Yusuke Koizumi, Eiichi Sasaki, Yasuhiro Take, 
    Hiroki Matsutani, Tadahiro Kuroda, Hideharu Amano, Ryuichi
    Sakamoto, Mitaro Namiki, Kimiyoshi Usami, Masaaki Kondo, 
    and Hiroshi Nakamura: A Scalable 3D Heterogeneous Multi-Core
    Processor with Inductive-Coupling ThruChip Interface,
    IEEE Symposium on Low-Power and High-Speed Chips(CoolChips XVI), 
    pp.1-3, April 19, 2013.
[2] Tetsuro Honmura, Yuki Kondoh, Tetsuya Yamada, Masashi Takada,
    Takumi Nitoh, Tohru Nojiri, and Keisuke Toyama, Yasuhiko
    Saitoh and Hirofumi Nishi, Mikiko Sato and Mitaro Namiki:
    Hardware Support for Resource Partitioning in Real-Time 
    Embedded Systems, IEEE Symposium on Low-Power and High-Speed 
    Chips(CoolChips XVI), pp.1-3, April 19, 2013.
[3] Yusuke Koizumi, Noriyuki Miura, Yasuhiro Take, Hiroki Matsutani
    Tadahiro Kuroda, Hideharu Amano, Ryuichi Sakamoto, Mitaro Namiki
    Kimiyoshi Usami, Masaaki Kondo, Hiroshi Nakamura:
    Performance and Energy Optimization of a Heterogeneous Multi-Core 
    Processor with Inductive Coupling Links, IEEE Symposium on 
    Low-Power and High-Speed Chips(CoolChips) XVI, Poster, April 18, 
    2013.
[4] Jun Tsukamoto, Motoki Wada, Yumi Shimada, Ryuichi Sakamoto, 
    Mikiko Sato, Masaaki Kondo, Kimiyoshi Usami, Hideharu Amano, 
    Hiroshi Nakamura, Mitaro Namiki: A Basic Study on Leakage Power 
    Reduction for FPU by Fine-grained Power Gating Control, 
    IEEE Symposium on Low-Power and High-Speed Chips(CoolChips) XVI, 
    Poster, April 18, 2013.
[5] Motoki Wada, Jun Tsukamoto, Hiroaki Kobayashi, Akihiro Takahashi, 
    Ryuichi Sakamoto, Mikiko Sato, Masaaki Kondo, Hideharu Amano, 
    Hiroshi Nakamura, and Mitaro Namiki: Dalvik VM JIT Compiler for 
    Fine-Grained Power Gating Control, IEEE Symposium on Low-Power 
    and High-Speed Chips(CoolChips) XVI, Poster, April 18, 2013.
[6] Kenichi Suzuki, Real-time Virtual NIC on KVM for Real-Time 
    Network with OpenFlow, LinuxCon Japan 2013, Student Presentations, 
    May 29, 2013.
[7] Yuji Sato, Mikiko Sato: Parallelization and fault-tolerance 
    of evolutionary computation on many-core processors,
    Proceedings of the 2013 IEEE Congress on Evolutionary Computation 
    (CEC-2013), pp.2602-2609, July 06-10, 2013.
[8] Yuji Sato, Mikiko Sato: Fault-tolerance of Distributed Genetic 
    Algorithms on Many-core Processors, Proceedings of the 2013 
    ACM/SIGEVO Genetic and Evolutionary Computation Conference 
    (GECCO-2013), pp.1749-1750, July 7, 2013.
[9] N.Miura, Y.Koizumi, E.Sasaki, Y.Take, H.Matsutani, K.Usami, 
    T.Kuroda, H.Amano, R.Sakamoto, M.Namiki, K.Usami, M.Kondo, 
    H.Nakamura: A Scalable 3D Heterogeneous Multi-Core Processor with 
    Inductive-Coupling ThruChip Interface, (Poster) HOTCHIPS 2013, 
    Aug. 2013.
[10] Y.Tsujita, K.Yoshinaga, A.Hori, M.Sato, M.Namiki, Y.Ishikawa: 
    Improving parallel I/O performance using multithreaded two-phase
    I/O with processor affinity management, 10th International
    Conference on Parallel Processing and Applied Mathematics 
    (PPAM 2013), Sep. 8-11, 2013 (to appear PPAM2013 Post-Proceedings).
[11] Y.Koizumi, N.Miura, Y.Take, H.Matsutani, T.Kuroda, H.Amano, 
    R.Sakamoto, M.Namiki, K.Usami, M.Kondo, H.Nakamura: 
    Demonstration of a Heterogeneous Multi-Core Processor with 3-D 
    Inductive Coupling Links, FPL2013, Sep. 2013.
[12] Hiroshi Miyata, Mitaro Namiki, Mikiko Sato: sQoS:The Design 
    and Prototyping of Secure QoS for Process Automation System, 
    IECON2013, pp.5680-568, Nov. 10-13, 2013.
[13] Yuichi Tsujita, Kazumi Yoshinaga, Atsushi Hori, Mikiko Sato,
    Mitaro Namiki and Yutaka Ishikawa: Multithreaded Two-Phase I/O:
    Improving Collective MPI-IO Performance on a Lustre File System,
    In Proceedings of PDP2014, pp.232-235, Turin, Feb. 12-14, 2014.
[14] Kimiyoshi Usami, Masaru Kudo, Kensaku Matsunaga, Tsubasa Kosaka, 
    Yoshihiro Tsurui, Weihan Wang, Hideharu Amano, Hiroaki Kobayashi, 
    Ryuichi Sakamoto, Mitaro Namiki, Masaaki Kondo, Hiroshi Nakamura: 
    Design and Control Methodology for Fine Grain Power Gating based 
    on Energy Characterization and Code Profiling of Microprocessors, 
    ASP-DAC 2014, pp.843-848, Jan. 2014.
[15] Masaaki Kondo, Hiroaki Kobyashi, Ryuichi Sakamoto, Motoki Wada, 
    Jun Tsukamoto, Mitaro Namiki, Weihan Wang, Hideharu Amano,
    Kensaku Matsunaga, Masaru Kudo, Kimiyoshi Usami, Toshiya Komoda 
    and Hiroshi Nakamura: Design and Evaluation of Fine-Grained 
    Power-Gating for Embedded Microprocessors, DATE 2014, pp.1-6, Mar. 2014.

仜嵏撉晅僔儞億僕僂儉
[1] 媨揷 岹, 暲栘 旤懢榊, 嵅摗 枹棃巕: OpenFlow傪棙梡偟偨QoS
    擣徹僒乕價僗僾儗乕儞摫擖偵娭偡傞婎慴揑専摙,   
    儅儖僠儊僨傿傾,暘嶶,嫤挷偲儌僶僀儖(DICOMO2013)僔儞億僕僂儉,
    pp.483-492 (2013-07-10).
[2] 楅栘 寬堦, 媨揷 岹, 嵅摗 枹棃巕, 暲栘 旤懢榊: OpenFlow偲
    嫤挷偡傞壖憐儅僔儞娐嫬偵偍偗傞儕傾儖僞僀儉捠怣婎斦偺愝寁,
    儅儖僠儊僨傿傾,暘嶶,嫤挷偲儌僶僀儖(DICOMO2013)僔儞億僕僂儉,
    pp.1859-1866 (2013-07-12).

乑尋媶夛, 嵏撉柍偟僔儞億僕僂儉
[1] 彫憅 桟懢丆嵅摗 枹棃巕丆暲栘 旤懢榊丗儅儖僠僐傾僾儘僙僢僒
    傪梡偄偨慻崬傒僔僗僥儉岦偗VMM偺愝寁偲幚憰, 忣曬張棟妛夛 
    戞197夞寁嶼婡傾乕僉僥僋僠儍丒戞125夞僔僗僥儉僜僼僩僂僃傾
    偲僆儁儗乕僥傿儞僌丒僔僗僥儉崌摨尋媶敪昞夛, Vol.2013-OS-125(7), 
    pp.1-8 (2013-04-18).
[2] 捤杮 弫丆榓揷 婎丆搱揷 桾枻丆嶁杮 棿堦丆嵅摗 枹棃巕丆
    嬤摗 惓復丆塅嵅旤 岞椙丆揤栰 塸惏丆拞懞 岹丆暲栘 旤懢榊:
    FPU偵偍偗傞嵶棻搙僷儚乕僎乕僥傿儞僌惂屼庤朄偺婎慴揑専摙,
    忣曬張棟妛夛 戞197夞寁嶼婡傾乕僉僥僋僠儍丒戞125夞僔僗僥儉
    僜僼僩僂僃傾偲僆儁儗乕僥傿儞僌丒僔僗僥儉崌摨尋媶敪昞夛, 
    Vol.2013-ARC-205(7), pp.1-8 (2013-04-18).
[3] 榓揷 婎丆捤杮 弫丆彫椦 峅柧丆崅嫶 徍岹丆嶁杮 棿堦丆嵅摗 枹棃巕丆
    嬤摗 惓復丆揤栰 塸惏丆拞懞 岹丆暲栘旤懢榊: Dalvik VM偵傛傞
    嵶棻搙PG惂屼偺摦揑僐乕僪惗惉, 忣曬張棟妛夛 戞197夞寁嶼婡傾
    乕僉僥僋僠儍丒戞125夞僔僗僥儉僜僼僩僂僃傾偲僆儁儗乕僥傿儞僌丒
    僔僗僥儉崌摨尋媶敪昞夛, Vol.2013-OS-125(5), pp.1-8 (2013-04-18).
[4] 搱揷 桾枻, 嶁杮 棿堦, 捤杮 弫, 榓揷 婎, 嵅摗 枹棃巕, 暲栘 旤懢榊:
    儕傾儖僞僀儉 OS 偵傛傞嵶棻搙僷儚乕僎乕僥傿儞僌惂屼庤朄偺専摙, 
    SWoPP杒嬨廈2013, 忣曬張棟妛夛乽僔僗僥儉僜僼僩僂僃傾偲僆儁儗乕僥傿
    儞僌丒僔僗僥儉乿戞126夞尋媶敪昞夛, Vol.2013-OS-126, No.6, pp.1-9 
    (2013-07-24).
[5] DOUANGCHAK SITHIXAY, 嵅摗 枹棃巕, 暲栘 旤懢榊: KVM傪梡偄偨
    壖憐壔娐嫬偵偍偗傞徣揹椡惂屼偺尋媶, SWoPP杒嬨廈2013, 忣曬
    張棟妛夛乽僔僗僥儉僜僼僩僂僃傾偲僆儁儗乕僥傿儞僌丒僔僗僥儉乿
    戞126夞尋媶敪昞夛, Vol.2013-OS-126, No.8, pp.1-9 (2013-07-24).
[6] 杧 撝巎, 搰揷 柧抝, 暲栘 旤懢榊, 嵅摗 枹棃巕, 怺戲 崑, 
    捯揷 桽堦, 愇愳 桾: 儊僯乕僐傾梡 Agent 僾儘僌儔儈儞僌娐嫬偺採埬,
    SWoPP杒嬨廈2013, 忣曬張棟妛夛乽僔僗僥儉僜僼僩僂僃傾偲僆儁儗乕僥傿
    儞僌丒僔僗僥儉乿戞126夞尋媶敪昞夛, Vol.2013-HPC-140, No.32, pp.1-8 
    (2013-07-24).
[7] 怺 戲崑丆嵅摗 枹棃巕丆媑塱 堦旤丆捯揷 桽堦丆搰揷 柧抝丆杧 撝巎丆
    暲栘 旤懢榊: 儊僯乕僐傾崿嵼宆暲楍寁嶼婡岦偗戝堟壖憐傾僪儗僗嬻娫
    儌僨儖Multiple PVAS偺採埬, 忣曬張棟妛夛乽僴僀僷僼僅乕儅儞僗僐儞僺
    儏乕僥傿儞僌尋媶夛乿戞141夞尋媶曬崘, Vol.2013-HPC-141, No.7丆
    pp.1-10 (2013-08-26).
[8] 揤栰塸惏, 彫愹 桟夘, 嶰塝 揟擵, 抾 峃岹,  徏扟 岹婭, 崟揷 拤峀, 
    嶁杮 棿堦, 暲栘 旤懢榊, 塅嵅旤 岞椙, 嬤摗 惓復, 拞懞 岹:
    儚僀儎儗僗嶰師尦愊憌儅儖僠僐傾僾儘僙僢僒 Cube-1 偺幚婡昡壙,
    怣妛媄曬, vol.113, no.234, CPSY2013-33, pp.13-18, 2013-09-26.
[9] 塅嵅旤岞椙, 岺摗 桪, 徏塱 寬嶌, 彫嶁 梼, 掃堜 宧戝, 墹 塙熂, 
    揤栰 塸惏, 彫椦 峅柧, 嶁杮 棿堦, 暲栘旤懢榊, 嬤摗 惓復, 拞懞 岹:
    嵶棻搙僷儚乕僎乕僥傿儞僌傪幚憰偟偨CPU 乭Geyser-3乭偺奐敪偲壏搙偵
    揔墳偟偨揹尮幷抐惂屼, DesignGaia'13, 怣妛媄曬, VLD2013-80, DC2013-46,
    vol.113, no.320, pp.135-140, 2013-11-20.
[10] DOUANGCHAK SITHIXAY丆嵅摗 枹棃巕丆嶳揷 峗巎丆暲栘 旤懢榊:
    徚旓僄僱儖僊乕梊應偵婎偯偄偨KVM壖憐壔娐嫬偵偍偗傞徣揹椡惂屼偺尋媶,
    忣曬張棟妛夛 乽僔僗僥儉僜僼僩僂僃傾偲僆儁儗乕僥傿儞僌丒僔僗僥儉乿
    戞127夞尋媶敪昞夛, Vol.2013-OS-127, No.8, pp.1-10 (2013-12-3).

仜岥摢敪昞
[1] 嶁杮 棿堦, 崅嫶 徍岹, 彫椦 峅柧, 嵅摗 枹棃巕, 揤栰 塸惏, 
    塅嵅旤 岞椙, 崟揷 拤峀, 嬤摗 惓復, 拞懞 岹, 嶰塝 揟擵, 暲栘 旤懢榊:
    嶰師尦儚僀儎儗僗愊憌偵傛傞僿僥儘僕僯傾僗儅儖僠僐傾僾儘僙僢僒偲
    僔僗僥儉僜僼僩僂僃傾偺幚尰, 忣曬張棟妛夛戞11夞愭恑揑寁嶼婎斦
    僔僗僥儉僔儞億僕僂儉 (SACSIS 2013), 億僗僞乕丒僨儌僙僢僔儑儞, 
    pp.97-98 (2013-05-15).
[2] 嶁杮棿堦: 夞楬媄弍偲僾儘僙僢僒偲OS, 戞46夞忣曬壢妛庒庤偺夛 (2013-09-14乣15).
[3] 嵅摗枹棃巕丆怺戲 崑丆搰揷柧抝丆媑塱堦旤丆捯揷桽堦丆杧 撝巎, 暲栘旤懢榊:
    儊僯乕僐傾崿嵼宆暲楍寁嶼婡岦偗戝堟壖憐傾僪儗僗嬻娫儌僨儖乽Multiple PVAS乿
    偺偨傔偺儊儌儕娗棟曽幃, 忣曬張棟妛夛僐儞僺儏乕僞僔僗僥儉僔儞億僕僂儉
    (ComSys 2013), 億僗僞乕丒僨儌僙僢僔儑儞 (2013-12-4).
[4] 楅栘寬堦丆媨揷丂岹丆嵅摗枹棃巕丆暲栘旤懢榊:
    壖憐儅僔儞儌僯僞偵偍偗傞儕傾儖僞僀儉捠怣傪曐徹偡傞壖憐NIC偺尋媶,
    忣曬張棟妛夛 戞76夞慡崙戝夛島墘榑暥廤, 1K-1 (2014-03-11).
[5] 彫幠撃巎丆嶁杮棿堦丆彫嶁丂梼丆嵅摗枹棃巕丆揤栰塸惏丆塅嵅旤岞椙丆
    嬤摗惓復丆拞懞丂岹丆暲栘旤懢榊: 儕乕僋儌僯僞傪梡偄偨嵶棻搙僷儚乕
    僎乕僥傿儞僌偺幚峴帪惂屼傪峴偆Linux僾儘僙僗僗働僕儏乕儔,
    忣曬張棟妛夛 戞76夞慡崙戝夛島墘榑暥廤, 2K-1 (2014-03-11).
[6] 搱揷桾枻丆嶁杮棿堦丆捤杮丂弫丆榓揷丂婎丆嵅摗枹棃巕丆暲栘旤懢榊:
    儕傾儖僞僀儉僔僗僥儉岦偗嵶棻搙僷儚乕僎乕僥傿儞僌惂屼偺偨傔偺
    僗働僕儏乕儕儞僌庤朄偺尋媶, 忣曬張棟妛夛 戞76夞慡崙戝夛島墘榑暥廤, 
    2K-2 (2014-03-11).
[7] 榓揷丂婎丆嵅摗枹棃巕丆揤栰塸惏丆嬤摗惓彶丆拞懞岹丆暲栘旤懢榊:
    Just-In-Time僐儞僷僀儔傪梡偄偨摦揑夝愅偵婎偯偔嵶棻搙PG惂屼,
    忣曬張棟妛夛 戞76夞慡崙戝夛島墘榑暥廤, 2K-3 (2014-03-11).
[8] 嶁杮棿堦丆嵅摗枹棃巕丆彫愹桟夘丆嬤摗惓復丆揤栰塸惏丆拞懞岹丆暲栘旤懢榊:
    慻崬傒岦偗CMA傾僋僙儔儗乕僞梡OpenCL儔僀僽儔儕偲OS偺愝寁,
    忣曬張棟妛夛 戞76夞慡崙戝夛島墘榑暥廤, 2K-7 (2014-03-11).
[9] 怺戲 崑丆嵅摗枹棃巕丆媑塱堦旤丆捯揷桽堦丆搰揷柧抝丆杧 撝巎, 暲栘旤懢榊:
    儅儖僠僐傾丒儊僯乕僐傾崿嵼宆寁嶼婡偵傛傞崅惈擻寁嶼岦偗傾僾儕
    働乕僔儑儞幚峴婎斦乽Multiple PVAS乿偺惈擻昡壙, 
    忣曬張棟妛夛 戞76夞慡崙戝夛島墘榑暥廤, 2K-9 (2014-03-11).
[10] 岦堜梼, 暯堜桟庽, 暲栘旤懢榊, 嬥巕宧堦:
     娭楢夋憸採帵偵傛傞擔塸帺摦東栿僠儍僢僩僔僗僥儉偵偍偗傞岆栿擣抦,
     忣曬張棟妛夛戞91夞僌儖乕僾僂僃傾偲僱僢僩儚乕僋僒乕價僗尋媶曬崘,
     Vol.GN91, No.4 (2014-03-14).
[11] 栰岥 戱墰, 屆媨 壝撨巕, 暲栘 旤懢榊, 彫扟 慞峴:
   丂僐儞僺儏乕僞彨婝偵偍偗傞SVM傪梡偄偨Move Ordering偺岠棪壔,
     忣曬張棟妛夛戞31夞僎乕儉忣曬妛尋媶曬崘, Vol.GI31, No.9 (2014-03-17).

仜夝愢
[1]  暲栘旤懢榊:嶻嬈媄弍僀僲儀乕僔儑儞恖嵽堢惉偺偨傔偺媄弍宱塩嫵堢,
     儁僞岅媊, 忣曬張棟, Vol.54, No.8, p.841 (2013-08).

仜庴徿
[1] CoolChips XVI Best Poster Award, Yusuke Koizumi:
    Yusuke Koizumi, Noriyuki Miura, Yasuhiro Take, Hiroki Matsutani
    Tadahiro Kuroda, Hideharu Amano, Ryuichi Sakamoto, Mitaro Namiki
    Kimiyoshi Usami, Masaaki Kondo, Hiroshi Nakamura:
    Performance and Energy Optimization of a Heterogeneous Multi-Core 
    Processor with Inductive Coupling Links, April 18, 2013.
    http://www.coolchips.org/
[2] 忣曬張棟妛戞197夞寁嶼婡傾乕僉僥僋僠儍尋媶夛 庒庤彠椼徿 榓揷 婎:
    榓揷 婎丆捤杮 弫丆彫椦 峅柧丆崅嫶 徍岹丆嶁杮 棿堦丆嵅摗 枹棃巕丆
    嬤摗 惓復丆揤栰 塸惏丆拞懞 岹丆暲栘旤懢榊: 
    Dalvik VM偵傛傞嵶棻搙PG惂屼偺摦揑僐乕僪惗惉 (2013-04-18).
    http://sigarc.hpcc.jp/?寁嶼婡傾乕僉僥僋僠儍尋媶夛庒庤彠椼徿庴徿幰堦棗
[3] 忣曬張棟妛夛戞125夞僔僗僥儉僜僼僩僂僃傾偲僆儁儗乕僥傿儞僌丒僔僗僥儉
    尋媶夛 嵟桪廏妛惗敪昞徿 榓揷 婎:
    榓揷 婎丆捤杮 弫丆彫椦 峅柧丆崅嫶 徍岹丆嶁杮 棿堦丆嵅摗 枹棃巕, 
    嬤摗 惓復丆揤栰 塸惏丆拞懞 岹丆暲栘 旤懢榊丗
    Dalvik VM偵傛傞嵶棻搙PG惂屼偺摦揑僐乕僪惗惉 (2013-04-18).
    http://www.ipsj.or.jp/sig/os/index.php?嵟桪廏妛惗敪昞徿
[4] 忣曬張棟妛SACSIS2013 桪廏億僗僞乕徿 嶁杮 棿堦:
    嶁杮 棿堦, 崅嫶 徍岹, 彫椦 峅柧, 嵅摗 枹棃巕, 揤栰 塸惏, 塅嵅旤 岞椙, 
    崟揷 拤峀, 嬤摗 惓復, 拞懞 岹, 嶰塝 揟擵, 暲栘 旤懢榊:
    嶰師尦儚僀儎儗僗愊憌偵傛傞僿僥儘僕僯傾僗儅儖僠僐傾僾儘僙僢僒偲
    僔僗僥儉僜僼僩僂僃傾偺幚尰 (2013-05-15).
    http://sacsis.hpcc.jp/2013/program.html.ja
[5] 忣曬張棟妛夛戞127夞僔僗僥儉僜僼僩僂僃傾偲僆儁儗乕僥傿儞僌丒僔僗僥儉
    尋媶夛 嵟桪廏妛惗敪昞徿 DOUANGCHAK SITHIXAY:
    DOUANGCHAK SITHIXAY丆嵅摗 枹棃巕丆嶳揷 峗巎丆暲栘 旤懢榊:
    徚旓僄僱儖僊乕梊應偵婎偯偄偨KVM壖憐壔娐嫬偵偍偗傞徣揹椡惂屼偺尋媶
    (2013-12-3).
    http://www.ipsj.or.jp/sig/os/index.php?嵟桪廏妛惗敪昞徿
[6] 忣曬張棟妛夛戞76夞慡崙戝夛 妛惗彠椼徿 楅栘寬堦:
    楅栘寬堦丆媨揷丂岹丆嵅摗枹棃巕丆暲栘旤懢榊乮擾岺戝乯, 
    壖憐儅僔儞儌僯僞偵偍偗傞儕傾儖僞僀儉捠怣傪曐徹偡傞壖憐NIC 偺尋媶
     (2014-03-11).
[7] 忣曬張棟妛夛戞76夞慡崙戝夛 妛惗彠椼徿 怺戲 崑:
    怺戲丂崑丆嵅摗枹棃巕乮擾岺戝乯丆媑塱堦旤丆捯揷桽堦丆搰揷柧抝丆
    杧丂撝巎乮棟壔妛尋乯丆暲栘旤懢榊乮擾岺戝乯,
    儅儖僠僐傾丒儊僯乕僐傾崿嵼宆寁嶼婡偵傛傞崅惈擻寁嶼岦偗傾僾儕
    働乕僔儑儞幚峴婎斦乽Multiple PVAS乿偺惈擻昡壙 (2014-03-11).


仜奺庬埾堳
- JIS埾堳
- NEDO埾堳
- JSPS埾堳
- 忣曬張棟妛夛
  - 僔僗僥儉僜僼僩僂僃傾偲僆儁儗乕僥傿儞僌丒僔僗僥儉尋媶夛塣塩埾堳
  - SACSIS(愭恑揑寁嶼婎斦僔儞億僕僂儉)SC埾堳挿
  - 榑暥帍嵏撉埾堳
  - 僨傿僕僞儖僾儔僋僥傿僗嵏撉埾堳
- 揹巕忣曬捠怣妛夛榑暥帍埾堳
- 僜僼僩僂僃傾壢妛夛曇廤埾堳

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